Simple Basic and Convex Processing Time and Power Models for Common Subtractive Manufacturing Processes (bibtex)
by Albert E Patterson, Satya R T Peddada, James T Allison
Reference:
Albert E Patterson, Satya R T Peddada, James T Allison. 'Simple Basic and Convex Processing Time and Power Models for Common Subtractive Manufacturing Processes.' Technical report, Engineering System Design Lab, UIUC-ESDL-2019-02, Urbana, IL, USA, Dec 2019.
Bibtex Entry:
@TechReport{Patterson2019TR,
  Title                    = {Simple Basic and Convex Processing Time and Power Models for Common Subtractive Manufacturing Processes},
  Author                   = {Patterson, Albert E and Peddada, Satya R T and Allison, James T},
  Institution              = {Engineering System Design Lab},
  Year                     = {2019},
  Address                  = {Urbana, IL, USA},
  Month                    = dec,
  Number                   = {UIUC-ESDL-2019-02},
  Type                     = {Technical Report},
  Pdf                      = {http://systemdesign.illinois.edu/publications/Patterson2019TR.pdf},
  Url                      = {http://hdl.handle.net/2142/106014},
  ESDLnote                 = {},
  ESDLid                   = {R8},
}
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